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Tool Corner

Logic Gate Simulator

Flip a switch and watch the signal actually travel. Eleven circuits, from a single AND gate up to a full adder, each with its wires lit in real time and its truth table filling in beside it.

New to this? A wire is either off (0) or on (1) — nothing in between. A gate is a component with one or two wires going in and one coming out, and a fixed rule for the output: an AND gate turns its output on only when both inputs are on; an OR gate when either is. A truth table is just that rule written out in full, one row for every combination of inputs. Flip the switches below and the matching row lights up.

Built and verified by Jogeswar, MSc, PMP — Tool CornerTruth tables checked against the references listed below
Start with a real example
Inputs — tap to flip
Boolean expression
{{ exprTxt }}
Circuit
{{ nameTxt }}
Inputs {{ inHead }}
{{ inTxt }}
Output {{ outHead }}
{{ outTxt }}
True in
{{ onesTxt }}
Truth table — {{ rowsTxt }} rows, {{ gatesTxt }} gates
# {{ inHead }} {{ outHead }}
{{ row.k }} {{ row.ins }} {{ row.outs }}
In plain English

The {{ nameTxt }} with its inputs at {{ inTxt }} produces {{ outTxt }}. Across every possible combination of inputs, it comes out true in {{ onesTxt }} rows.

What next?

What your result means

Every wire in a digital circuit is in one of two states, and the whole of computing is built from rules about which combinations produce which. A lit amber wire is carrying a logic 1; a dim one is at 0. The lamp on the right is the circuit's answer for the switch positions you have set.

The truth table underneath is the complete specification of the circuit — every possible input combination and what comes out. Two things follow from that. A circuit is fully described by its table, so two circuits with the same table are interchangeable however differently they are drawn. And true in counts the rows where the first output is 1, which is the measure of how selective the circuit is: an AND fires in one row of four, an OR in three.

Why this one is different

The full truth table is printed with the row matching your current inputs picked out, so the circuit can be read as a rule rather than as one outcome. The count of true inputs, the number of rows the table needs and the gate count sit beside it, which is what makes a De Morgan equivalence visible.

How it works

Each circuit here is stored as a small graph: the inputs, then a list of gates that name where their signals come from. The simulator walks that list in order, applies the one-line rule for each gate type, and keeps the running values. The drawing and the truth table both read the same graph, so what the wires show and what the table says cannot drift apart — a wrong gate would be wrong in both places at once.

The combinational circuits further down the list are worth tracing by hand. A half adder is nothing but XOR and AND sharing two inputs: XOR gives the sum bit, AND gives the carry, because 1 + 1 is 0 carry 1. A full adder chains two half adders so a carry can come in from the column to its right, and stacking those is literally how a processor adds numbers. Small pieces of arithmetic, made of nothing but these seven gates.

How to use this simulator

  1. Pick a circuit. The first seven are single gates; the last four are built from several.
  2. Tap the input switches and watch which wires light. Pulses travel only along lines carrying a 1.
  3. Press step through all rows to cycle every input combination in turn, with the truth table following along.
  4. Or click any row in the table to jump the circuit straight to that combination.
  5. Compare NAND against AND, then OR against NOR — the shape barely changes, but the little bubble on the output inverts everything.

The seven gates

AND Y = A · B 1 only when both inputs are 1
OR Y = A + B 1 when at least one input is 1
NOT Y = Ā the single-input inverter
NAND Y = ( A · B )' AND with the output inverted
NOR Y = ( A + B )' OR with the output inverted
XOR Y = A ⊕ B 1 only when the inputs differ
XNOR Y = ( A ⊕ B )' 1 only when the inputs match
  • · — boolean AND, written like multiplication because it behaves like it on 0 and 1
  • + — boolean OR, written like addition, though 1 + 1 is 1 rather than 2
  • Ā or ' — negation, the small bubble on a gate output
  • — exclusive OR, true when the inputs disagree

Worked example

Take the full adder with all three inputs at 1 — the hardest column in a binary addition, where a carry arrives and both digits are set:

A = 1, B = 1, Cᵢₙ = 1
first XOR: 1 ⊕ 1 = 0
sum: 0 ⊕ 1 = S = 1
first AND: 0 · 1 = 0
second AND: 1 · 1 = 1
carry out: 0 + 1 = Cₒᵤₜ = 1

Which reads as 1 + 1 + 1 = 3, written in binary as 11: a sum bit of 1 and a carry of 1. Select the full adder above, press all inputs 1, and both lamps light with exactly these values.

Frequently asked questions

What is the difference between XOR and OR?

OR is true when at least one input is 1, including when both are. XOR is true only when the inputs differ, so it goes back to 0 when both are 1. That single row is the whole difference, and it is why XOR is the gate that adds two bits: 1 plus 1 is 0 with a carry, which is exactly what XOR and AND produce together.

Why is NAND called a universal gate?

Because every other gate can be built from NAND alone. A NAND with both inputs tied together is a NOT. Two NANDs make an AND. Three make an OR. Since any boolean function can be written with AND, OR and NOT, any function at all can be built from NAND, which is why chip fabrication cares about it so much. NOR is universal for the same reason.

How many rows should a truth table have?

Two to the power of the number of inputs. Two inputs give four rows, three inputs give eight, and ten inputs would give 1,024. That doubling is why engineers move to boolean algebra and Karnaugh maps rather than enumerating rows once a circuit grows past three or four inputs.

Related tools

Assumptions & limitations

  • Ideal, instantaneous gates. Real gates have propagation delay measured in nanoseconds, and the glitches that delay causes are a large part of why timing analysis exists. Nothing here has any delay at all.
  • Combinational only. Every circuit's output depends solely on its current inputs. Latches, flip-flops and anything with memory need feedback, which this model does not allow.
  • A fixed set of circuits, not a canvas. This is a simulator for reading and understanding standard circuits, not a schematic editor for drawing your own.
  • Two-input gates. Real logic families offer three- and four-input gates; the multi-gate circuits here build wider functions by cascading instead.
  • No electrical behaviour. Fan-out, logic levels, noise margins and supply voltage are all outside the model — for the electrical side, start with the Ohm's law calculator.

Further reading

Our guide to logic gates and boolean algebra takes the same seven gates through De Morgan's laws, Karnaugh maps and the adder that turns them into arithmetic. If you are here for an electronics course rather than a computing one, the engineering formulas reference carries the analogue half of the subject.

Sources & references

The gate symbols, the boolean identities and the adder constructions follow the standards and texts below rather than any one vendor's conventions.

  • IEEE Std 91a-1991 — graphic symbols for logic functions, the distinctive gate shapes drawn here
  • MIT OpenCourseWare 6.004 — combinational logic, universal gates and adder construction
  • NIST — historical reference on binary arithmetic in digital computing
Last updated
This is a logical model, not a circuit simulation

Gates here switch instantly and perfectly. Real logic has propagation delay, finite rise times, fan-out limits, voltage thresholds and glitches during transitions — the things that make timing the hard part of digital design. The truth tables are exact; the behaviour over time is not modelled.